Apparatus for executing coded dependent instructions having vari

Details Apparatus for executing coded dependent instructions having vari Apparatus for executing coded dependent instructions having vari

1997-06-25

1999-11-16

An, Meng-Ai T.

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

712 23, 712 24, 712 25, 712205, 712214, 712215, 712231, 712233, G06F 900

Patent

active

059875941

ABSTRACT:
A processor that executes coded instructions using an instruction scheduling unit receiving the coded instructions and issuing an instruction for execution. A replay signaling device generates a signal indicating when the instruction failed to execute properly within a predetermined time. A replay device within the instruction scheduling unit responsive to the signaling device then reissues the instruction for execution.

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Smith, Alan Jay; "Cache Memories," Computing Surveys, vol. 14, No. 3, Sep. 1982, pp. 473-530.

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