Apparatus for executing Chinese remainder theorem for residue de

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G06F 738

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047093455

ABSTRACT:
A mechanism for implementing the Chinese remainder theorem includes a signal processing architecture that is effectively configured principally of binary adders and lookup tables having small address space. Through a set of lookup tables referencing a prescribed divisor, a respective set of summands are expressed in terms of quotients and remainders. Those signal lines over which the quotient representative data is produced are summed in a modulo-power-of two adder, while the remainder data is summed in a simple binary adder. The resulting sums are then recombined into a common data format, using a reduced capacity lookup table and binary adders.

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