Apparatus for executing an instruction and for simultaneously ge

Details Apparatus for executing an instruction and for simultaneously ge Apparatus for executing an instruction and for simultaneously ge

1983-05-18

1986-12-16

Thomas, James D.

Boots, shoes, and leggings

364715, G06F 1204, G06F 738

Patent

active

046301925

ABSTRACT:
In a computer system, an instruction is executed. The results of the execution of the instruction are stored, and, simultaneously with the execution of the instruction, information is generated and stored which is related to the results of the execution of the instruction. This information is used by the computer system during the execution of subsequent instructions. The results of the execution of the instruction comprise a binary number. The information which is generated, simultaneously with the execution of the instruction, includes, inter-alia, a count of the number of binary "1" bits and binary "0" bits which constitute the binary number, and a set of addresses representing the address locations of each bit of the binary number which constitutes the stored results of the execution of the instruction. The set of addresses include a first set of addresses representing address locations for all the binary "1" bits and a second set of addresses representing address locations for all the binary "0" bits of the binary number. The first set of addresses are stored in a first portion of a memory, the second set of addresses being stored in a second portion of the memory. As a result, the information is immediately available upon completion of the execution of the instruction.

REFERENCES:
patent: 3815095 (1974-06-01), Wester
patent: 3939455 (1976-02-01), Toyosawa
patent: 4128880 (1978-12-01), Cray, Jr.
patent: 4169212 (1979-09-01), Kinch, Jr. et al.
patent: 4287566 (1981-09-01), Culler
patent: 4371951 (1983-02-01), Kort et al.
patent: 4486848 (1984-12-01), Kaminski
Duff, "Computing Structures for Image Processing", 1983 Academic Press, pp. 187 to 188 and 193 to 194.

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