Apparatus for executing a load instruction or exchange instructi

Electrical computers and digital processing systems: processing – Instruction issuing

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711200, 712208, G06F 938

Patent

active

060790113

ABSTRACT:
An apparatus having a stack-top updating unit for processing an exchange instruction and a load instruction in parallel in a pipe-lined processor having a stack register file. Based on an information signal representing a modification of the stack-top after the current instruction is executed in a first pipe-line, a control signal indicating that a load instruction is executed by one of the first and second pipe-lines, and a second pipe-line enable signal, the stack-top updating unit generates a new stack-top signal and a current stack-top signal. The first pipe-line, in response to the current stack-top signal and operands, executes the operands, and the second pipe-line, in response to the new stack-top signal and the control signal, performs the load instruction or an exchange instruction. As a result, the load instruction or the Fload instruction can be simultaneously executed with another instruction or operand in the pipe-lined processor in an effective manner.

REFERENCES:
patent: 5367650 (1994-11-01), Sharangpani et al.
patent: 5475824 (1995-12-01), Grochowski et al.
patent: 5634118 (1997-05-01), Blomgren
patent: 5764943 (1998-06-01), Wechsler
patent: 5913047 (1999-06-01), Mahalingaiah et al.

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