Apparatus for ethernet PHY/MAC communication

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S419000, C370S420000, C370S395200, C370S395500

Reexamination Certificate

active

06975637

ABSTRACT:
An integrated Ethernet PHY/MAC apparatus having a single link partner capability register shared between a PHY and a corresponding MAC, which implements IEEE Standard 302.3, including IEEE Standards 802.3u and 802.3x. Apparatus also includes plural PHYs, each having a corresponding MAC integrably coupled therewith such that an integrated multi-port Ethernet device is realized. A network consists of at least one integrated Ethernet PHY/MAC device having a single link partner capability register.

REFERENCES:
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patent: 6094436 (2000-07-01), Runaldue et al.
patent: 6272551 (2001-08-01), Martin et al.
patent: 6504851 (2003-01-01), Abler et al.
Johnson, H.W., “Detailed Guide to Fast Ethernet,” Fast Ethernet, Dawn of a New Network, 1996, Prentice Hall PTR, USA (XP-002149327), pp. 112-114 and 170-174.
H. W. Johnson, “Detailed Guide to Fast Ethernet,”Fast Ethernet. Dawn of a New Network, 1996, pp. 112-114, Chapter 3, Prentice Hall PTR, USA (XP-002149327).

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