Apparatus for estimating the square root of digital samples

Details Apparatus for estimating the square root of digital samples Apparatus for estimating the square root of digital samples

1986-05-15

1988-07-12

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 752

Patent

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047574674

ABSTRACT:
Circuitry for calculating the square root of a binary number iterates the equation E(K+1)=E(K)+(S-E(K).sup.2) where E(K+1) is the current estimate of the square root of the sample S and E(K) is the previous estimate. The value E(K).sup.2 is estimated in order to reduce the complexity of the hardware. An application is described for real time processing of digital audio signals in serial-bit format.

REFERENCES:
patent: 4298951 (1981-11-01), Hall
patent: 4477879 (1984-10-01), Wong
patent: 4503549 (1985-03-01), Slabinski
patent: 4700319 (1987-10-01), Shiner
OST Bulletin No. 60-Office of Science and Technology-Appendix II.
Leslie B. Tyler et al., "A Companding System for Multichannel TV Sound", IEEE Trans. on Consumer Electronics, vol. CE 30, No. 4, Nov. 1984, pp. 633-640.
C. T. Fike, Computer Evaluation of Mathematical Functions, Prentice-Hall Inc., Englewood Cliffs, N.J., 1968, pp. 22-31.

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