Apparatus for error detection and reporting on a synchronous bus

Details Apparatus for error detection and reporting on a synchronous bus Apparatus for error detection and reporting on a synchronous bus

1989-01-09

1990-11-20

Smith, Jerry

Excavating

371 491, 371 61, G06F 1110

Patent

active

049723456

ABSTRACT:
An error detection apparatus is implemented in a passive device inserted on a synchronous bus, linking two devices. The bus has data lines onto which data are transferred between the two devices under control of tag lines and clock signals which are companion of the transferred data. The apparatus allows errors to be detected, the failing device to be identified and the error signals to be reported in a psuedo-synchronous way on an error bus due to error detection and reporting logic circuits and a pseudo-synchronous timing circuit.

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