Apparatus for error correction

Excavating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

371 39, 371 44, G06F 1110

Patent

active

045326290

ABSTRACT:
In apparatus for error correction in which data sequences containing blocks of data, previously arranged on a known time-base, and formed of data words and check words are written into a memory under control of a write address generator, and the data sequences are subsequently read out from the memory under control of a write address generator, so as to generate rearranged data sequences; during writing and reading of the data sequences, error correction is carried out by apparatus that includes an error correction arithmetic circuit for performing the error correction calculation, a pointer addition circuit for adding a pointer to the data words in association with an error state of the blocks, and a memory for memorizing a microprogram having fields to control the error correction arithmetic circuit and pointer addition circuit.

REFERENCES:
patent: 3231858 (1966-01-01), Tuomenoksa et al.
patent: 4291406 (1981-09-01), Bahl et al.
patent: 4360916 (1982-11-01), Kustedjo et al.
patent: 4398224 (1983-08-01), Wantanabe
patent: 4433415 (1984-02-01), Kojima
patent: 4437185 (1984-03-01), Sako et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus for error correction does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for error correction, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for error correction will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2377078

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.