Apparatus for emulation of electronic hardware system

Data processing: structural design – modeling – simulation – and em – Emulation – Of peripheral device

Reexamination Certificate

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Details

C702S118000, C714S725000, C716S030000

Reexamination Certificate

active

06377911

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electronic hardware systems. More particularly, the present invention relates to apparatus for emulation of electronic hardware system.
THE PRIOR ART
As electronic components and electronic systems have become more complex, the design of these components and systems has become a more time consuming and demanding task. Recently software simulation of electronic components and systems has become an important tool for designers. Simulation of a design is the execution of an algorithm that models the behavior of the actual design. Simulation provides the ability to analyze and verify a design without actually constructing the design and has many benefits in the design process. However, simulation suffers from three major limitations: the speed of the simulation, the need for simulation models, and the inability to actually connect a simulation of one part of a design to an actual physical implementation of another part of the design.
Simulation accelerators have come to be used to address the problems of the execution speed of simulation. A simulation accelerator uses special purpose hardware to execute simulation algorithms in order to achieve higher speeds than can be achieved using general purpose computers. None the less, simulation accelerators still execute an algorithm that models the actual design and consequently remain substantially slower than a real hardware implementation. Accelerators do not in any way obviate the need for software models of all devices to be simulated.
Physical modeling systems such as the Valid Real Chip or Daisy PMX address the problem of the lack of availability of software models for complex standard parts. They also address to some degree the speed of execution of complex software models. Physical modelers are used in conjunction with software simulators. The modeling engine and an actual part plugged into it are used in lieu of a model of that part and are connected to a simulator which can then use the actual responses of the part in lieu of a simulation model of the part. The primary innovations in the arena of physical modeling have been associated with this connection between the modeler and the simulator.
Similar design and verification problems that arise with the use of standard microprocessors have been addressed through the use of microprocessor in-circuit emulators supplied by a number of companies. A microprocessor in-circuit emulator uses an actual microprocessor, or a specially modified version of the standard microprocessor, combined with special purpose instrumentation logic to make the job of debugging a design easier. A microprocessor in-circuit emulator includes a cable which can be plugged into a system in lieu of the actual microprocessor so that the actual system can be run at or near real time during debugging.
While all of these techniques provide advantages in the design and verification process, none satisfy all of the needs for designing and debugging including: near real time operation for non-standard parts, in-circuit emulation for other than standard parts, and freedom from the need for software models for all devices.
BRIEF DESCRIPTION OF THE INVENTION
An apparatus is disclosed and claimed which aids in the development of integrated circuit and system design by quickly and automatically generating a hardware prototype of the integrated circuit or system to be designed from the user's schematics or net list. The prototype is electrically reconfigurable and may be modified to represent an indefinite number of designs with little or no manual wiring changes or device replacement. The prototype runs at real time or close to real time speed and may be plugged directly into a larger system. VLSI chips or ASIC devices may be plugged into the prototype and run as part as the emulated design.
The apparatus of the present invention includes an emulation array, which is an array of an electrically programmable gate arrays used to implement the necessary logic functions and connect them together into a complete design. The gate arrays provide both logic implementation and signal routing between fixed printed circuit board traces. Few or no manual steps such as wire wrapping, or replacement of PALs are required to modify the design.
External cables along with a series of adaptor plugs allow the programmable breadboard to be connected directly to an existing system or printed circuit board. The apparatus of the present invention replaces a chip or board as a part of a larger system. Additional debugger hardware is included to allow internal nodes of the design to be probed and the resulting wave forms displayed without requiring the user to manually move wires. Internal nodes may also be stimulated.
A user supplied netlist or schematic is converted into a correct configuration file for use by the apparatus.


REFERENCES:
patent: 3106698 (1963-10-01), Unger
patent: 3287702 (1966-11-01), Borck, Jr. et al.
patent: 3287703 (1966-11-01), Slotnick
patent: 3473160 (1969-10-01), Wahlstrom
patent: 3810577 (1974-05-01), Drescher et al.
patent: 3928730 (1975-12-01), Agaard et al.
patent: 3955180 (1976-05-01), Hirtle
patent: 4020469 (1977-04-01), Manning
patent: 4032899 (1977-06-01), Jenny et al.
patent: 4306286 (1981-12-01), Cocke et al.
patent: 4315315 (1982-02-01), Kossiakoff
patent: 4357678 (1982-11-01), Davis
patent: 4386403 (1983-05-01), Hsieh et al.
patent: 4404635 (1983-09-01), Flaker
patent: 4459694 (1984-07-01), Ueno et al.
patent: 4488354 (1984-12-01), Chan et al.
patent: 4503386 (1985-03-01), DasGupta et al.
patent: 4510602 (1985-04-01), Engdahl et al.
patent: 4524240 (1985-06-01), Stock et al.
patent: 4525789 (1985-07-01), Kemper et al.
patent: 4527115 (1985-07-01), Mehrotra et al.
patent: 4527249 (1985-07-01), Van Brunt.
patent: 4539564 (1985-09-01), Smithson
patent: 4541071 (1985-09-01), Ohmori
patent: 4577276 (1986-03-01), Dunlop et al.
patent: 4578761 (1986-03-01), Gray
patent: 4583169 (1986-04-01), Cooledge
patent: 4587625 (1986-05-01), Marion, Jr. et al.
patent: 4593363 (1986-06-01), Burstein et al.
patent: 4600846 (1986-07-01), Burrows
patent: 4612618 (1986-09-01), Pryor et al.
patent: 4613940 (1986-09-01), Shenton et al.
patent: 4621339 (1986-11-01), Wagner et al.
patent: 4642487 (1987-02-01), Carter
patent: 4656580 (1987-04-01), Hitchcock, Sr. et al.
patent: 4656592 (1987-04-01), Spaanenburg et al.
patent: 4674089 (1987-06-01), Poret et al.
patent: 4675832 (1987-06-01), Robinson et al.
patent: 4695740 (1987-09-01), Carter
patent: 4695950 (1987-09-01), Brandt et al.
patent: 4695968 (1987-09-01), Sillivan, II et al.
patent: 4695999 (1987-09-01), Lebizay
patent: 4697241 (1987-09-01), Lavi
patent: 4700187 (1987-10-01), Furtek
patent: 4706216 (1987-11-01), Carter
patent: 4713557 (1987-12-01), Carter
patent: 4722084 (1988-01-01), Morton
patent: 4725835 (1988-02-01), Schreiner et al.
patent: 4725971 (1988-02-01), Doshi et al.
patent: 4736338 (1988-04-01), Saxe et al.
patent: 4740419 (1988-04-01), Elmer
patent: 4744084 (1988-05-01), Beck et al.
patent: 4747102 (1988-05-01), Funatsu
patent: 4752887 (1988-06-01), Kuwahara
patent: 4758745 (1988-07-01), ElGamal et al.
patent: 4758985 (1988-07-01), Carter
patent: 4761768 (1988-08-01), Turner et al.
patent: 4768196 (1988-08-01), Jou et al.
patent: 4769817 (1988-09-01), Krohn et al.
patent: 4777606 (1988-10-01), Fournier
patent: 4782440 (1988-11-01), Nomizu et al.
patent: 4782461 (1988-11-01), Mick et al.
patent: 4786904 (1988-11-01), Graham et al.
patent: 4787061 (1988-11-01), Nei et al.
patent: 4787062 (1988-11-01), Nei et al.
patent: 4791602 (1988-12-01), Resnick
patent: 0217291 (1986-09-01), None
patent: 1444084 (1976-07-01), None
patent: 218220 (1986-09-01), None
patent: 2180382 (1987-03-01), None
patent: 58-147236 (1983-09-01), None
patent: 58-147237 (1983-09-01), None
patent: 58-205870 (1983-11-01), None
patent: 59-161839 (1984-09-01), None
“The Homogenous Computational Medium; New Technology For Computation”, Concurrent Logic Inc., Jan. 26, 1987.
Spandorfer, “Synthesis of Logic Functions on an Array of Integrated

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