Apparatus for efficiently interconnecing channels of a multiproc

Details Apparatus for efficiently interconnecing channels of a multiproc Apparatus for efficiently interconnecing channels of a multiproc

1990-08-31

1993-10-19

Fleming, Michael R.

Boots, shoes, and leggings

395275, 364228, 3642419, 364238, 364240, 3642402, 364DIG1, G06F 1242, G06F 1516

Patent

active

052553728

ABSTRACT:
Apparatus for efficiently interconnecting OEMI channels of a multiprocessor facility. A plurality of channel adapters are connected to individual channels from a plurality of processors. A supervisory interrupt driven microprocessor receives a link request from a channel adapter when the channel adapter has determined that two logical adapters are in an appropriate architected state. The microprocessor will assign a data bus to channel adapters involved in a link request if certain criteria is met by said link requests, signifying an efficient transfer between said channel adapters is likely.

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