Apparatus for effecting simulation of a logic circuit and method

Details Apparatus for effecting simulation of a logic circuit and method Apparatus for effecting simulation of a logic circuit and method

1989-11-27

1991-09-24

Smith, Jerry

Boots, shoes, and leggings

364489, 364490, 364578, G06F 1122

Patent

active

050519115

ABSTRACT:
An apparatus for effecting a logic circuit simulation based on logic circuit information concerning the logic circuit and input signal information concerning each of circuit elements constituting the logic circuit according to simulation control information and producing output signal information, and a method for producing a semiconductor device using the simulation approach. By determining an input side signal delay value and an output side signal delay value with respect to a circuit element which is a simulation object, comparing the determined delay values and, based on a result of the comparing, determining an output signal value of the simulation object circuit element, it is possible to effect a perfect simulation on a transistor level subordinate to a gate level in practical processing time without using a special computer.

REFERENCES:
patent: 4715035 (1987-12-01), Boehner
patent: 4763289 (1988-08-01), Barzilai et al.
patent: 4907180 (1990-03-01), Smith
patent: 4922445 (1990-05-01), Mizoue et al.
patent: 4937770 (1990-06-01), Samuels et al.
patent: 4940908 (1990-07-01), Tran

Affiliated with

Also associated with

Rating

Apparatus for effecting simulation of a logic circuit and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for effecting simulation of a logic circuit and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for effecting simulation of a logic circuit and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1702027