Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-04-13
2002-12-31
Lao, Lun-Yi (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C315S169200, C315S169400
Reexamination Certificate
active
06501445
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for driving a plasma display panel (PDP), and more particularly, to an apparatus for driving a three-electrode alternating-current (AC) surface discharge type PDP using an address-while-display driving method.
2. Description of the Related Art
FIG. 1
shows a general three-electrode AC surface-discharge type PDP.
FIG. 2
shows an electrode line pattern of the PDP shown in FIG.
1
.
FIG. 3
shows another view of one pixel in the PDP of FIG.
1
. Referring to the drawings, address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
, a dielectric layer
11
(and/or
141
of FIG.
3
), scan electrode lines Y
1
, Y
2
, . . . , Y
n
, common electrode lines X
1
, X
2
,. . . , X
n
and a MgO layer
12
as a protective layer are provided between front and rear glass substrates
10
and
13
of a general surface-discharge PDP
1
.
The address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
, are coated over the front surface of the rear glass substrate
13
in a predetermined pattern. Phosphors (
142
of
FIG. 3
) may be coated over the front surface of the address electrode lines A
1
, A
2
, . . . , A
m−1
and A
m
. Otherwise, the phosphors
142
may be coated on the dielectric layer
141
of
FIG. 3
in the event that the dielectric layer
141
is coated over the address electrode lines A
1
, A
2
, . . . , A
m−1
, and A
m
in a predetermined pattern.
The common electrode lines X
1
, X
2
, . . . , X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n
are arranged on the rear surface of the front glass substrate
10
so as to be orthogonal to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m−1
and A
m
in a predetermined pattern. The respective intersections define corresponding pixels. The common electrode lines X
1
, X
2
, . . . , X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n
are each comprised of indium tin oxide (ITO) electrode lines X
na
and Y
na
and a metal bus electrode lines X
nb
and Y
nb
, as shown in FIG.
3
. The dielectric layer
11
is entirely coated over the rear surface of the common electrode lines X
1
, X
2
, . . . , X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n
. The MgO layer
12
for protecting the panel
1
against a strong electrical field is entirely coated over the rear surface of the dielectric layer
11
. A gas for forming plasma is hermetically sealed in a discharge space
14
.
The driving method generally adopted to the PDP described above is a method in which a reset step, an address step and a sustain-discharge step are sequentially performed in a unit sub-field. In the reset step, residual wall charges in the previous field are removed. In the address step, wall charges are produced at selected pixels. In the sustain-discharge step, light is emitted from pixels at which the wall charges have been formed in the address step. In other words, when an AC pulse of a relatively high voltage is applied between the common electrode lines X
1
, X
2
, . . . , X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n
, surface discharges occur at the pixels at which the wall charges are formed. At this time, plasma is formed in a gas layer, and the phosphors
142
is excited due to radiation of ultraviolet rays, thereby generating light.
A plurality of unit sub-fields having the above basic operating principal are included in a unit frame, thereby displaying a desirable gradation due to different times of the sustain-discharge periods of the sub-fields.
In an apparatus for driving the PDP described above, conventionally, a scanning driver and a discharge sustaining driver are separately provided to drive the scan electrode lines Y
1
, Y
2
, . . . , Y
n
. The scanning driver applies scanning signals to the scan electrode lines Y
1
, Y
2
, . . . , Y
n
in response to scan data in a predetermined scanning order during an address period for forming wall charges at pixels to be selected. The discharge sustaining driver applies discharge sustaining signals to the scan electrode lines Y
1
, Y
2
, . . . , Y
n
in response to discharge sustain data during a sustain-discharge period for generating light at the selected pixels. As described above, the scanning driver and the discharge sustaining driver are separately provided to drive the scan electrode lines Y
1
, Y
2
, . . . , Y
n
because it is preferable that the level of a positive polarity voltage used during the address period is different from the level of a negative polarity voltage used during the sustain-discharge period, and the level of a negative polarity voltage used during the address period is different from the level of the negative polarity voltage used during the sustain-discharge period. However, the structure having separated drivers has a disadvantage of complicating a driving circuit and a control algorithm and increasing manufacturing costs.
SUMMARY OF THE INVENTION
To solve the above problem, an object of the present invention is to provide an apparatus for driving a plasma display panel, which can simplify a driving circuit and a control algorithm and reduce manufacturing costs.
To achieve the above object, the present invention provides an apparatus for driving a plasma display panel (PDP) having front and rear substrates to be separated and opposed to each other and having common, scan and address electrode lines between the front and rear substrates, the common electrode lines and the scan electrode lines being arranged in parallel, the address electrode lines being arranged to be orthogonal to the scan electrode lines, thereby defining pixels corresponding to the respective intersections.
The apparatus includes a scanning driver, an address driver, a common driver and a controller. The scanning driver, in which a scanning circuit is combined with a discharge sustaining circuit with respect to each of the scan electrode lines, applies scanning signals to the scan electrode lines in response to scan data in a predetermined scanning order during an address period for forming wall charges at pixels to be selected and applies discharge sustaining signals to the scan electrode lines in response to discharge sustain data during a sustain-discharge period for generating light at the selected pixels. The address driver applies address signals to the address electrode lines in response to an input display data signal. The common driver applies common signals to the common electrode lines in response to an input common data signal. The controller processes externally input image data and generates the scanning data, the discharge sustain data, the display data signal and the common data signal.
According to the present invention, the scanning driver applies the scanning signals to the scan electrode lines in response to the scan data during the address period and also applies the discharge sustaining signals to the scan electrode lines in response to the discharge sustain data during the sustain-discharge period. Accordingly, the present invention does not require an additional discharge sustaining driver for the scan electrode lines, thereby simplifying a driving circuit and a control algorithm and decreasing manufacturing costs.
REFERENCES:
patent: 4866349 (1989-09-01), Weber et al.
patent: 5446344 (1995-08-01), Kanazawa
patent: 5677600 (1997-10-01), Takahashi et al.
patent: 5835072 (1998-11-01), Kanazawa
patent: 5943030 (1999-08-01), Minamibayashi
patent: 6100859 (2000-08-01), Kuriyama et al.
patent: 6211865 (2001-04-01), Hosoi et al.
patent: 6239775 (2001-05-01), Kang
patent: 97-17861 (1997-04-01), None
Lao Lun-Yi
Lowe Hauptman & Gilman & Berner LLP
Samsung SDI & Co., Ltd.
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