Apparatus for driving plasma display panel

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C315S169200, C315S169400, C345S060000

Reexamination Certificate

active

06208081

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for driving a plasma display panel, and more particularly, to an apparatus for driving a three-electrode surface-discharge alternating-current plasma display panel by an address-while-display driving method.
2. Description of the Related Art
FIG. 1
shows a general three-electrode surface-discharge alternating-current plasma display panel,
FIG. 2
is a diagram showing a electrode line pattern of the plasma display panel shown in
FIG. 1
, and
FIG. 3
shows a cell forming a pixel of the plasma display panel shown in FIG.
1
. Referring to the drawings, address electrode lines A
1
, A
2
, A
3
, . . . , A
m-2
, A
m-1
and A
m
, a dielectric layer
11
(and/or
141
of FIG.
3
), scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
, common electrode lines X
1
, X
2
, . . . , X
n-1
and X
n
and a MgO protective film
12
are provided between front and rear glass substrates
10
and
13
of a general surface-discharge plasma display panel
1
.
The address electrode lines A
1
, A
2
, A
3
, . . . , A
m-2
, A
m-1
and A
m
, are coated over the entire surface of the rear glass substrate
13
in a predetermined pattern. Phosphors (
142
of
FIG. 3
) may be coated over the entire surface of the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
. Otherwise, the phosphors
142
may be coated on the dielectric layer
141
in the event that the dielectric layer is coated over the entire surface of the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
in a predetermined pattern.
The common electrode lines X
1
, X
2
, . . . , X
n-1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
are arranged on the rear surface of the front glass substrate
10
so as to be orthogonal to the address electrode lines A
1
, A
2
, A
3
, . . . , A
m-2
, A
m-1
and A
m
in a predetermined pattern. The respective intersections define corresponding pixels. The common electrode lines X
1
, X
2
, . . . , X
n-1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
are each comprised of indium tin oxide (ITO) electrode lines X
na
and Y
na
, and a metal bus electrode lines X
nb
and Y
nb
, as shown in FIG.
3
. The dielectric layer
11
is entirely coated over the rear surface of the common electrode lines X
1
, X
2
, . . . , X
n-1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
. The MgO protective film
12
for protecting the panel
1
against a strong electrical field is entirely coated over the rear surface of the dielectric layer
11
. A gas for forming plasma is hermetically sealed in a discharge space.
The driving method generally adopted to the plasma display panel described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining in the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixel at which the wall charges are formed in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X
1
, X
2
, . . . , X
n-1
and X
n
and the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
, a surface discharge occurs at the pixel at which the wall charges are formed. Here, plasma is formed at the gas layer of the discharge space
14
and the phosphors
142
are excited by ultraviolet rays to thus emit light.
Here, several unit sub-fields basically operating in the principles as described above are contained in a unit frame, thereby achieving a desired gray scale display by sustain discharge time intervals of the respective sub-fields.
Typical examples of such driving methods are an address/display separation driving method and an address-while-display driving method.
According to the address/display separation driving method, in a unit sub-field set for gray scale display, an address period and a sustain discharge period are separated. Accordingly, it is easy to design and change a driving apparatus and the driving apparatus is simplified. However, the sustain discharge period is relatively short, which lowers display luminance.
On the other hand, according to the address-while-display driving method, an address period is contained within a display period of each sub-field, the respective sub-fields start with a difference of a unit time with respect to the respective scan electrode lines so as to be overlapped. Here, the unit time refers to a minimum driving period for gray scale display and equals to a value obtained by dividing a unit frame by the number of gray scales to be displayed. Accordingly, the sustain discharge period is relatively longer, thereby increasing display luminance. However, since a scanning operation cannot be sequentially performed in an arrangement order of the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
, it is difficult to design the circuitry of a scan drive part of the driving apparatus.
In the conventional driving apparatus for driving a plasma display panel by the address-while-display driving method, the scan drive part applies a scan drive signal to a scan electrode line Y
1
, Y
2
, . . . , Y
n-1
or Y
n
corresponding to a set scanning order using only a serial-in/parallel-out shift register having as many output ports as the scan electrode lines Y
1
, Y
2
, . . . , Y
n-1
and Y
n
. For example, in order to apply the scan drive signal to the 129
th
scan electrode line Y
129
after the scan drive signal is applied to the first scan electrode line Y
1
, Y
2
, . . . , Y
n-1
or Y
n
, 129 shift clock pulses must be generated.
Accordingly, the above-described conventional driving apparatus has the following problems.
First, a standby time ranging from the time of applying a scan drive signal to a scan electrode line to the time of applying the scan drive signal to another scan electrode line for performing address-while-display driving is comparatively long. Accordingly, the address period is increased and the sustain discharge period is shortened, which lowers display luminance.
Second, in the case of a high resolution plasma display panel, that is, a plasma display panel having many scan electrode lines, frequencies of clock pulses must be relatively high. Accordingly, the driving apparatus operates unstably and a picture quality is deteriorated. Also, it is difficult to design and fabricate the driving apparatus.
SUMMARY OF THE INVENTION
To solve the above problem, it is an objective of the present invention to provide a driving apparatus for driving a plasma display panel by an address-while-display driving method, which can increase display luminance and picture quality, operate stably and facilitates design and fabrication of the same.
Accordingly, to achieve the above objective, there is provided an apparatus for driving a plasma display panel in which front and rear substrates face and are spaced apart from each other, common electrode lines, scan electrode lines and address electrode lines are arranged between the front and rear substrates, the common electrode lines are arranged parallel to the scan electrode lines and the address electrode lines are arranged orthogonal to the scan electrode lines to define pixels at intersections thereof, the apparatus including a scan drive part having a memory in which scan data are stored in a predetermined scanning order, for applying a scan drive signal to the scan electrode lines in accordance with scan data corresponding to an input address, an address drive part for applying an address drive signal to the corresponding address electrode lines in accordance with an input display data signal, a common drive part for applying a common drive signal to the common electrode lines in accordance with an input common data signal, and a control part for processing externally input image data and genera

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