Apparatus for determining the next address of a requested block

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G06F 1304, G11C 800

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active

042323657

ABSTRACT:
Apparatus for determining the next data word of a requested block of data words in interlaced rotating mass memories to enable transfer of the requested block from other than the first word in the block to reduce the effective average latency. The system assumes the use of a memory storage element which is read in a serial rotational fashion (e.g., drum, disk, charge coupled device, etc.). The present invention compares the address of the data requested by a Central Processor Unit (CPU) with the address from the interlaced memory storage element that indicates its present rotational position. From these addresses, it computes the address of the next accessible cell within the requested block and transfers that address to the CPU to enable it to access the requested block at the earliest possible time.

REFERENCES:
patent: 3327294 (1967-06-01), Furman et al.
patent: 3350694 (1967-10-01), Kusnick et al.
patent: 3355718 (1967-11-01), Talarczyk
patent: 3829837 (1974-08-01), Farr, Jr.

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