Apparatus for determining the minimum number of storage elements

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3649471, 3649674, 3649703, 3649704, G06F 104, G06F 1200

Patent

active

048581798

ABSTRACT:
This invention relates generally to techniques for designing electrical circuitry and more specifically relates to a method for determining the minimum number of storage elements required to store the states of circuit. This determination is achieved by combining the output states of a circuit which occur during a pair of adjacent clock intervals into a combined state occurring during a combined clock interval. The combining step is then repeated until all possible ones of the combined states have been obtained. Still more specifically, the method includes the step of generating, prior to the combining step, a waveform pattern showing the output states of the circuit. Once the minimum number of combined states is determined, the minimum number of storage elements required can be determined by invoking the equation: m= log.sub.2 n , wherein m is the number of storage elements or memory registers and n is the sum of all possible ones of the combined states. An improved clock circuit, with its associated combinatorial logic is also disclosed. The clock circuit, as a result of the above described method steps, requires fewer storage registers and less combinatorial logic.

REFERENCES:
patent: 4191996 (1980-03-01), Chesley
patent: 4335425 (1982-06-01), Goto et al.
patent: 4443864 (1984-04-01), McElroy
patent: 4467443 (1984-08-01), Shima

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