Apparatus for detecting and correcting errors in arithmetic proc

Details Apparatus for detecting and correcting errors in arithmetic proc Apparatus for detecting and correcting errors in arithmetic proc

1978-08-30

1980-07-15

Malzahn, David H.

Boots, shoes, and leggings

G06F 1110

Patent

active

042131880

ABSTRACT:
An apparatus for detecting and correcting errors in the arithmetic processing of data represented in the numerical system of residual classes comprises a register coupled to a residue calculator, a control unit coupled to a constant storage unit which connects an error syndrome calculator, a comparator coupled to an error syndrome calculator. A modulo adder is connected to the register and to the residue calculator whereas single and multiple error detectors are coupled to the register and to the residue calculator via a first group of AND gates and are also coupled to a group of OR gates and to an analyzing unit via a group of OR gates. The analyzing unit connects second and third groups of AND gates as well as a second output bus and a logic unit coupled to an adder which is connected to a first output bus. Coupled to the adder are a fourth group of AND gates, a control flip-flop and the register. The second group of AND gates is coupled to an OR gate and to the constant storage unit. The register and control flip-flop are coupled to input buses.

REFERENCES:
patent: 3137788 (1964-06-01), Froggatt
patent: 3602704 (1971-08-01), Akushsky et al.
Mandelbaum, "Error Correction in Residue Arithmetic", IEEE Trans. on Computers, vol. C-21, No. 6, Jun. 1972, pp. 538-545.
Yau et al., "Error Correction in Redundant Residue Number Systems", IEEE Trans. on Computers, vol. C-22, No. 1, Jan. 1973, pp. 5-11.

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