Apparatus for detecting a preamble in a bi-phase data recovery s

Details Apparatus for detecting a preamble in a bi-phase data recovery s Apparatus for detecting a preamble in a bi-phase data recovery s

1976-04-29

1977-10-18

Chapnick, Melvin B.

Boots, shoes, and leggings

307220R, 307231, 307269, G06F 104, H03K 518

Patent

active

040549500

ABSTRACT:
In order to detect the eminent reception of a valid bit serial message, a preamble constituting a string of predetermined number of clock pulses only is employed. Prior to detection of the preamble, each clock and data pulse from the raw data stream is applied to the increment input of a resettable counter. Each clock pulse is also used to trigger a monostable multivibrator which issues a pulse approximating three-fourths of a cell period. This pulse is ANDed with the next subsequent data period, and if a data "1" bit is detected, the satisfied condition is used to reset the counter. Thus, the counter can only reach a terminal count if a valid preamble is received. When the counter attains its terminal count, a latch flip-flop is set and a resultant "separation enable" signal issues to activate straightforward logic for separating the incoming clock and data pulses. Setting the latch also disables the preamble detection logic until an "end of data field" code is sensed whereupon the counter and latch are both reset to resume observation of the raw data stream for a preamble.

REFERENCES:
patent: 3046526 (1962-07-01), Scantlin
patent: 3399351 (1968-08-01), Reszka
patent: 3428904 (1969-02-01), Aziz
patent: 3453551 (1969-07-01), Haberle
patent: 3537013 (1970-10-01), Feldman
patent: 3550017 (1970-12-01), Whalen
patent: 3818358 (1974-06-01), Russell
patent: 3894246 (1975-07-01), Torgrim
patent: 3922613 (1975-11-01), Allen et al.
patent: 3940764 (1976-02-01), Beeswing
patent: 3990049 (1976-11-01), Wirth

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