Patent
1983-07-21
1985-09-10
Rubinson, Gene Z.
179 18HB, 179 84A, H04M 304
Patent
active
045408530
ABSTRACT:
The apparatus comprises a zero pass detector (2) for detecting zero passes in a voltage signal proportional to the line current to generate a pulse signal constituted by positive and negative rectangular pulses of equal amplitude and of width dependant on the duty ratio of the line signal, a pulse signal processor constituted by a saturable integrator circuit (4) connected to integrate the pulse signal and to deliver a triangular signal having a positive peak value which increases after ringing has been answered, a comparator (6) connected to compare the triangular signal with a positive reference voltage (+Vr) and to deliver a loop detected signal when the peak value reaches the reference value, the loop detected signal being applied to a bistable logic device (8) which serves to store the loop detected signal and to deliver an output signal from the apparatus based on the stored signal.
REFERENCES:
patent: 3746798 (1974-08-01), Thomas
patent: 3829619 (1973-07-01), Close et al.
patent: 4110569 (1978-08-01), Schindler et al.
patent: 4132864 (1979-01-01), Feng
patent: 4355206 (1982-10-01), Israel et al.
patent: 4356355 (1982-10-01), Ferrieu et al.
patent: 4396805 (1983-08-01), Wagner
Compagnie Industrielle des Telecommunications Cit-Alcatel
DiVito Elio
Rubinson Gene Z.
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