Data processing: structural design – modeling – simulation – and em – Emulation – In-circuit emulator
Reexamination Certificate
2005-08-02
2008-08-05
Rodriguez, Paul L (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Emulation
In-circuit emulator
C703S015000, C703S023000, C331S078000, C716S030000
Reexamination Certificate
active
07409331
ABSTRACT:
A method for designing an integrated circuit having analog and digital circuit portions is disclosed. The method involves providing an emulation circuit, which preferably comprises a number of gates equivalent to a number of gates in the digital circuit portion, affixing the emulation circuit on a test substrate together with a version of the analog circuit portion having at least some of the defined functions of the analog circuit portion, and then testing the analog circuit version.
REFERENCES:
patent: 4831510 (1989-05-01), Dummermuth et al.
patent: 5193070 (1993-03-01), Abiko et al.
patent: 5563524 (1996-10-01), Ungar
patent: 5668507 (1997-09-01), Boersrler et al.
patent: 5719572 (1998-02-01), Gong
patent: 5737342 (1998-04-01), Ziperovich
patent: 5754764 (1998-05-01), Davis et al.
patent: 5793778 (1998-08-01), Qureshi
patent: 5909463 (1999-06-01), Johnson et al.
patent: 6009260 (1999-12-01), Sakairi
patent: 6275555 (2001-08-01), Song
patent: 6282503 (2001-08-01), Okazaki et al.
patent: 6286117 (2001-09-01), Yun et al.
patent: 6300807 (2001-10-01), Miyazaki et al.
patent: RE37500 (2002-01-01), Lee
patent: 6460172 (2002-10-01), Insenser farre et al.
patent: 6625557 (2003-09-01), Perkins et al.
patent: 6825773 (2004-11-01), O'Toole et al.
patent: 6947883 (2005-09-01), Gupta
patent: 2001/0049806 (2001-12-01), Porteners et al.
patent: 2003/0099210 (2003-05-01), O'Toole et al.
patent: 2003/0223510 (2003-12-01), Kurakami et al.
patent: 2005/0052306 (2005-03-01), Voicu et al.
patent: 2005/0052556 (2005-03-01), Henderson et al.
patent: 2005/0186930 (2005-08-01), Rofougaran et al.
Barua et al., “A method to diagnose faults in analog integrated circuits using artificial neural networks with pseudo random noise as stimulus”, IEEE 2003.
Negreiros et al., “Low cost analog testing of RF signal paths”, IEEE 2004.
Broadcom Corporation
Rodriguez Paul L
Sterne Kessler Goldstein & Fox PLLC
Thangavelu Kandasamy
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