Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
1997-02-10
2001-06-05
Le, Vu (Department: 2615)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C375S240210
Reexamination Certificate
active
06243421
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for decoding coded video data and particularly, to a coded video data decoder in which video data of e.g. MPEG2 coded format is decoded with a frame memory minimized in the storage size.
2. Description of the Related Art
Among various methods of minimizing the storage size of a frame memory in decoding of coded video data is a scalable decoder (
FIG. 1
) such as depicted in “Scalable decoder without low-frequency drift” by Iwahashi et al, (Singaku Giho, DSP94-108). The scalable decoder is a device for decoding a part of coded data and thus allows the storage size of a frame memory to be decreased with the use of IDCT (inverse discrete cosine transform) with a low degree as shown.
Video data of e.g. MPEG2 coded format is variable length decoded by a variable length decoder
1
and resultant quantized DCT coefficients are inverse quantized by an inverse quantizer
2
to produce 8×8 DCT coefficients. When 4×4 DCT coefficients in the 8×8 DCT coefficients are subjected to two-dimensional IDCT process of a 4×4 IDCT 10, video data consisting of 4×4 pixels is reconstructed which is ½ of the original video data in both the horizontal and vertical directions. If a block to be decoded is motion compensation blocks, the motion compensation blocks are supplied from a motion compensator
8
and added to the 4×4 pixel data for reproducing decoded video data. The decoded video data is ½ of the original size in both the horizontal and vertical directions and enlarged by an upsampler
11
before stored at the succeeding step in a sequence in a memory, not shown, for display.
Also, the decoded video data is stored in a frame memory
6
of which storage size is ¼ of the original size because the data to be stored is ½ of the original size in both the horizontal and vertical directions. For carrying out a motion compensation process in a reduced space, a motion vector converter
12
is provided for converting a motion vector to ½ in both horizontal and vertical and extracting its corresponding blocks from the frame memory
6
. If the two-dimensional IDCT process is executed with 4×4 IDCT in the horizontal direction and 8×8 IDCT in the vertical direction, the decoded video data and the frame memory are ½ of the original size.
The foregoing conventional method is capable of reducing the frame memory size by changing IDCT size but may create drift noise due to inconformity of a predictive image between the coding side and the decoding side and lower the quality of a reconstructed image. Also, the resolution of the reconstructed image will be as low as ½ or ¼ of the original.
SUMMARY OF THE INVENTION
It is an object of the present invention, for solving the conventional problems, to provide an apparatus for decoding coded video data which is capable of decreasing the storage size of its frame memory while attenuating the drift noise and minimizing lowering of the resolution during the reconstruction of the coded video data.
The present invention is implemented by a data size reducing means for reducing the size of a decoded video data reconstructed by subsampling, pixel differential coding, or other means, a frame memory for saving a reduced video data released from the data size reducing means, and a data size recovering means for recovering the original size of the decoded video data from the reduced data saved in the frame memory or saving means.
According to the present invention, the storage size of the frame memory is decreased by a combination of compression of pixel data to be saved in the frame memory without or with lowering its quality to a minimum and IDCT processing in a reduced block size and will successfully attenuate unwanted drift noise and minimize declination of the resolution as compared with the conventional frame memory size reducing methods.
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Iwahashi et al, “Design of Motion Compensation Filters of Frequency Scalable Coding—Drift Reduction—”, IEEE, pp. 277-280.*
“A Drift Free Scalable Decoder”, Technical Report of IEICE (Shingaku Giho, DSP 94-108), by Masahiro Iwahashi et al., Jan. 26, 1995, pp. 63-70, (translation of Abstract).
Nakajima Yasuyuki
Ujihara Kiyono
Kokusai Denshin Denwa Kabushiki Kaisha
Le Vu
Westman Champlin & Kelly P.A.
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