Boots – shoes – and leggings
Patent
1984-06-27
1987-06-30
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
046775838
ABSTRACT:
An apparatus for decimal multiplication divides a multiplier of binary coded decimal (BCD) into plural groups, generates plural partial products of which are multiplied a multiplicand of BCD and the plural groups of multiplier over successive cycles and adds them to an intermediate product which is a summation of the previously generated partial products. The addition of the partial product and the intermediate product is made by a carry save adder. At a first cycle, the intermediate product is set to zero, and the addition of 6 is made to each digit of either one of the intermediate product sum and the partial product, and the addition of the partial product and the intermediate product is made by a carry save adder loop over successive cycles. At a final cycle, the sum and carry from the carry save adder are added by a full adder, and the subtraction of 6 is made for each digit according to the existence of carry transfer in each digit of the full adder and the resultant value is output as a multiplication result.
REFERENCES:
patent: 3644724 (1972-02-01), Hristor et al.
patent: 3958112 (1976-05-01), Miller
patent: 4543641 (1985-09-01), Fukuta et al.
Larson, "High-Speed Multiply Using Four Input Carry-Save Adder" IBM Tech. Disclosure Bulletin vol. 16, No. 7, Dec. '73, pp. 2053-2054.
Larson "Medium Speed Multiply" IBM Tech. Disclosure Bulletin vol. 16, No. 7, Dec. '73 p. 2055.
Fukuta Masaharu
Ishikawa Sako
Ohtsuki Toru
Oshima Yoshio
Yabe Hideaki
Hitachi , Ltd.
Malzahn David H.
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