Apparatus for conversion between IEEE standard floating-point nu

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341 50, G06F 738, H03M 700

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048315753

ABSTRACT:
An apparatus for conversion between IEEE standard floating-point numbers and two's complement floating-point numbers provides a specialized circuit for high-speed two-way conversion between the IEEE standard floating-point format and the two's complement floating-point format. The apparatus eliminates problems that occur when the conversion is performed by a computer program.

REFERENCES:
W. Cody et al., "A Proposed Radix and Word-Length-Independent Standard for Floating-Point Arithmetic", IEEE Micro, vol. 4, #4, Aug. 1984, pp. 86-100.
"A Proposed Standard for Binary Floating-Point Arithmetic", Introductory Comments by David Stevenson, Chairman, Floating Point Working Group Micropocessor Standards Committee, IEEE Computer Society, 1981.
"A Floating Point Format For Signal Processing", TRW LSI Products, La Jolla, CA, 1982, Dr. John A. Eldon, Craig Robertson.

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