Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2004-11-05
2008-11-04
Ngo, Chuong D (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07447725
ABSTRACT:
An apparatus for controlling rounding modes in a single instruction multiple data (SIMD) floating-point unit is disclosed. The SIMD floating-point unit includes a floating-point status-and-control register (FPSCR) having a first rounding mode bit field and a second rounding mode bit field. The SIMD floating-point unit also includes means for generating a first slice and a second slice. During a floating-point operation, the SIMD floating-point unit concurrently performs a first rounding operation on the first slice and a second rounding operation on the second slice according to a bit in the first rounding mode bit field and a bit in the second rounding mode bit field within the FPSCR, respectively.
REFERENCES:
patent: 2003/0023646 (2003-01-01), Lin et al.
patent: 2003/0167460 (2003-09-01), Desai et al.
patent: 2004/0034760 (2004-02-01), Paver et al.
patent: 2005/0144212 (2005-06-01), Simkins et al.
Dhong Sang Hoo
Hofstee Harm Peter
Jacobi Christian
Mueller Silvia Melitta
Oh Hwa-Joon
Dillon & Yudell LLP
International Business Machines - Corporation
Ngo Chuong D
Rifai D'Ann N.
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