Patent
1997-02-28
1998-11-03
Luu, Le Hien
395877, 395872, G06F 1300
Patent
active
058323082
ABSTRACT:
The present invention provides a data transfer device that transfers data via a buffer memory between first and second external interfaces. A FIFO is interposed between the first external interface and the buffer memory. An empty signal is true when the FIFO is empty an empty signal is true and a full signal is true when the FIFO is full. The data transfer device transfers data from the buffer memory to the FIFO when the full signal is false and decrementing a transfer count of data to be transferred. An end signal is set to true when the transfer count reaches zero. An interface device transfers data from the FIFO to the first external interface when the empty signal is false. The data transfer from the FIFO to said first external interface ends when both the end signal and the empty signal area true.
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Nakamura Yoshihiro
Ogawa Takao
Luu Le Hien
Seiko Epson Corporation
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