Apparatus for controlling access to a memory

Details Apparatus for controlling access to a memory Apparatus for controlling access to a memory

1983-03-30

1985-09-17

Thomas, James D.

Boots, shoes, and leggings

371 13, 371 38, 365222, G11C 700

Patent

active

045424543

ABSTRACT:
A computer system having a central processing unit, a dynamic memory controller, an error detection and correction network and a dynamic memory for storing data that are subject to being refreshed and to data bit errors. The dynamic memory controller has a refresh mode for controlling access to the memory only to refresh the data, a refresh with error detection and correction mode, for controlling access to the memory to merge or simultaneous refresh a row of data while detecting and correcting data bit errors, and a read/write mode for controlling access to the memory in response to CPU requests for a read/write memory operation.

REFERENCES:
patent: 4183096 (1980-01-01), Cenker et al.
patent: 4319356 (1982-03-01), Kocol et al.
patent: 4369510 (1983-01-01), Johnson et al.
patent: 4380812 (1983-04-01), Ziegler, II et al.
patent: 4412314 (1983-10-01), Proebsting
"Am2960 Series", Advanced Micro Devices, 1980.
"8207 Advanced Dynamic RAM Controller", Intel Corporation, Apr. 1982.
"LSI Memory Controllers: System Design Trends and Architectures", Northcon 1982 Professional Program Papers, #14, May 18-20, 1982.
"Dynamic Storage Cleanup", IBM Technical Disclosure Bulletin, vol. 25, No. 4, Sep. 1982.

Affiliated with

Also associated with

Rating

Apparatus for controlling access to a memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for controlling access to a memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for controlling access to a memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-372935