Electricity: motive power systems – Induction motor systems – Primary circuit control
Patent
1994-03-03
1997-04-22
Masih, Karen
Electricity: motive power systems
Induction motor systems
Primary circuit control
318801, 318798, 363 26, 363 41, 388811, H02P 528
Patent
active
056231920
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to an apparatus for carrying out a current control for a so-called variable speed driving system (hereinafter, referred to as a variable speed driver) which improves a current control characteristic in a proximity to a voltage saturation in an electric current control system of a voltage type PWM inverter and a method for carting out the current control therefor.
BACKGROUND ART
FIG. 1 shows a structure of a variable speed driver using a voltage type PWM (Pulse Width Modulation) inverter disclosed in a Japanese Patent Application No. Heisei-2-7983 filed on Jan. 17, 1990.
In FIG. 1, numeral 1 denotes a vector control section using data on a speed or torque instruction and speed detection and so forth, numeral 2 denotes an ACR (current) control section which carries out current control calculations in response to a current instruction derived from the vector control section, numeral 3 denotes a PWM pattern generator which calculates a three-phase PWM pattern according to a voltage amplitude of a voltage space vector and phase instruction derived from the ACR control section and issues a PWM instruction on the basis of the calculated PWM pattern, numeral 4 denotes a dead time compensator, numeral 5 denotes a gate signal circuit, numeral 6 denotes a drive circuit, numeral 7 denotes an inverter circuit, and numeral 8 denotes an induction motor.
Furthermore, in FIG. 1, numeral 9 denotes a voltage detector, numeral 10 denotes a current detector, numeral 11 denotes a speed detector, numeral 12 denotes a sample hold circuit which holds an instantaneous output current in synchronization with an intermediate sample hold signal of a 0 (zero) vector from the PWM pattern generator until an A/I) conversion is carried out, numeral 13 denotes an A/D converter, numeral 22 denotes an adder which derives a power supply speed .omega..sub.o from a rotor speed .omega..sub.r of the speed detector 11 and a slip angular velocity .omega..sub.s.
FIG. 5 shows a circuit block of the PWM pattern generator 3. In FIG. 5, numeral 31 denotes a PWM pattern calculation block which receives a voltage instruction .vertline. V.vertline. derived from the ACR control section 1, an output voltage phase .phi. restriced between 60.degree. from an output voltage phase instruction .theta.v, a DC power supply voltage Vdc, and PWM carrier wave period (PWM time) Tc, calculates the PWM pattern using a circle approximation method, and outputs voltage vector times T.lambda. and T.mu. whose phases are mutually different by 60.degree., and 0 vector time To.
Next, numeral 32 denotes a three-arm modulating time data preparation section which prepares time data such that 0 vector time To is divided into half To/2 to both sides of the voltage vector times T.lambda. and T.mu. during a half PWM time Tc/2 as shown in FIG. 6 and outputs time data of T.sub.1, T.sub.2, and T.sub.3.
In addition, numeral 33 denotes a time changeover switch which converts the time data of T.sub.1, T.sub.2, and T.sub.3 into each phase voltage time Tu, Tv, and Tw and numeral 24 denotes and ON/OFF switching circuit which performs the switching of Tu, Tv, and Tw and outputs each please voltage signal Vu, Vv, and Vw (PWM pattern).
It is noted that, in FIG. 5, numeral 35 denotes a mode selection circuit for every 60.degree. of the output voltage phase .theta.v from the ACR control section, numeral 36 denotes a reference phase output table which receives the output signal of the every-60.degree. mode circuit 35 and outputs a reference phase .phi..lambda. for every 60.degree., numeral 37 (namely, a symbol .+-..largecircle. in FIG. 5) denotes a subtractor which subtracts the reference phase .phi..lambda. for every 60.degree. from the output voltage phase .phi.v and outputs the output voltage phase .phi. restricted between 60.degree. to the PWM pattern calculation block 31, numeral 38 denotes a switch selection table which controls the time changeover switch 33 according to the output of the every-60.degree. mode selection circuit 35 for every 60.degr
REFERENCES:
patent: 4847743 (1989-07-01), Kamiyama
patent: 5023538 (1991-06-01), Mutoh et al.
patent: 5369345 (1994-11-01), Phan et al.
patent: 5376872 (1994-12-01), Hara
patent: 5416686 (1995-05-01), Azuma et al.
patent: 5436823 (1995-07-01), Araki
Patent Abstracts of Japan, vol. 14, No. 45 (E-0880), Jan. 26, 1990.
Patent Abstracts of Japan, vol. 15, No. 494 (E-1145), Dec. 13, 1991.
Kabushiki Kaisha Meidensha
Masih Karen
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