Apparatus for arbitrating for a high speed direct memory access

Details Apparatus for arbitrating for a high speed direct memory access Apparatus for arbitrating for a high speed direct memory access

1990-10-24

1995-11-28

Swann, Tod R.

G06F 1328

Patent

active

054716390

ABSTRACT:
A high speed direct memory access (DMA) sub-system of a microprocessor system provides data interfaces between a high speed peripheral bus, such as a small computer system interface (SCSI) bus, and a DMA random access memory (RAM) to provide the data bandwidth necessary to prevent a bottleneck to transfers through the high speed peripheral bus. To his end, the invention has a separate DMA bus and a separate DMA RAM over which high speed data transactions may be made at a very high speed using one or more DMA cycles. The DMA transactions are controlled by a high speed data controller. Primary control of the DMA subsystem is assigned to the DMA sub-system, but the microprocessor may arbitrate for control of the sub-system. The microprocessor has the highest priority so it wins all arbitrations unless a DMA cycle is in progress, and in that event, the DMA cycle is temporarily given highest priority. Once the microprocessor has gained control, the sub-system control bus, address bus and data may be used to provide a status interrogation or a READ of the DMA RAM. When it gains control, the microprocessor operates the sub-system at a lower speed than does the DMA controller.

REFERENCES:
patent: 4042811 (1977-08-01), Brunnett et al.
patent: 4067059 (1978-01-01), Derchak
patent: 4131944 (1978-12-01), Mager et al.
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
patent: 4313160 (1982-01-01), Kaufman et al.
patent: 4354225 (1982-10-01), Frieder et al.
patent: 4400771 (1983-08-01), Suzuki et al.
patent: 4455620 (1984-06-01), Watanabe et al.
patent: 4481572 (1984-11-01), Ochsner
patent: 4519028 (1985-05-01), Olsen et al.
patent: 4530053 (1985-07-01), Kriz et al.
patent: 4751634 (1988-06-01), Burrus, Jr. et al.
patent: 4783730 (1988-11-01), Fischer
patent: 4786847 (1988-11-01), Daggett et al.
patent: 4797812 (1989-01-01), Kihara
patent: 4815074 (1989-03-01), Jacobsen
patent: 4821170 (1989-04-01), Bernick et al.
patent: 4827409 (1989-05-01), Dickson
patent: 4916692 (1990-04-01), Clarke et al.
patent: 5003463 (1991-03-01), Coyle et al.

Affiliated with

Also associated with

Rating

Apparatus for arbitrating for a high speed direct memory access does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for arbitrating for a high speed direct memory access , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for arbitrating for a high speed direct memory access will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2021198