Apparatus for applying OFF-state stress to P-MOS device

Details Apparatus for applying OFF-state stress to P-MOS device Apparatus for applying OFF-state stress to P-MOS device

2006-05-02

2006-05-02

Shankar, Vijay (Department: 2673)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S092000, C345S093000, C345S095000, C345S099000, C345S102000, C345S211000, C345S212000

Reexamination Certificate

active

07038644

ABSTRACT:
An apparatus for applying an OFF-state stress to a P-MOS device of one of an array substrate for an LCD device and an LCD panel having attached substrates includes: a power supply unit supplies a source power; a panel loading unit including a plurality of panel jigs on which one of the array substrate and the LCD panel is loaded; a voltage control unit including a plurality of voltage control channels and modulating a voltage of the source power; a frequency control unit including a plurality of frequency control channels and modulating a frequency of the source power; a time setting unit determining a time period of supplying the source power; and a panel selecting unit including a plurality of panel selecting channels and modulating an application of the source power.

REFERENCES:
patent: 5995073 (1999-11-01), Isami et al.
patent: 6115017 (2000-09-01), Mikami et al.
patent: 6118221 (2000-09-01), Kumasaka et al.

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