Apparatus for and method of generation of ripple carry signals i

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G06F 750

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044398352

ABSTRACT:
A logical AND and logical OR gate are utilized in conjunction with two signals forming bits to be added for ascertaining the value of generate and propagate signals. The generate signal is passed to the output whenever the carry input is a logic zero and the propagate signal is supplied to the output whenever the carry signal is a logic one. This simplification of the approach to generating ripple carry signals substantially reduces the number of transistor to a value of about one-half that utilized in the prior art.

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Wade, "Ripple Adder Carry Logic" IBM Tech. Disclosure Bulletin vol. 10, No. 11, Apr. 1969, pp. 1638-1639.
Weller, "A High-Speed Carry Circuit for Binary Adders" IEEE Trans. on Computers vol. C-18, No. 8, Aug. 1969, pp. 728-732.
Lamdam et al., "A Circuit for High-Speed Carry Propagation in LSI-FET Technology" The Radio & Electronic Engineer vol. 46, No. 7, pp. 337-341 Jul. 1976.
Hong, "Ripple Carry Hardware with One-Device Delay Per Stage" IBM Tech. Disclosure Bulletin vol. 19, No. 11, Apr. 1977, pp. 4295-4296.

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