Apparatus for and method of biasing a transistor

Amplifiers – With amplifier condition indicating or testing means

Reexamination Certificate

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C330S296000

Reexamination Certificate

active

07323929

ABSTRACT:
An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mthorder differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mthorder differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lthorder derivative of the transistor's performance.

REFERENCES:
patent: 5986508 (1999-11-01), Nevin
patent: 6531924 (2003-03-01), Aparin
patent: 7064614 (2006-06-01), Feng et al.
patent: 2007/0188234 (2007-08-01), Beffa
patent: WO 00/01065 (2000-01-01), None
patent: WO 02/063768 (2002-08-01), None
patent: WO 03/079587 (2003-09-01), None
Millman, Jacob, “Microelectronics : Digital and Analog Circuits and Systems”, (ISBN 0-07-Y66410-2), pp. 244-245. McGraw-Hill 6th printg 1985 VG Book paperback.
Kang, S., et al, “Linearity Analysis of CMOS for RF Application”, IEEE Transactions on Microwave Theory and Techniques, vol. 51, No. 3, Mar. 2003.
PCT Search Report, PCT/US2007/005749, Jul. 4, 2007.

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