Apparatus for analyzing semiconductor memories

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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324 51, 324 73R, G01R 3122, G01R 3102

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active

RE0323888

ABSTRACT:
[The disclosure is of] An apparatus for generating raster scans on an oscilloscope combined with an electron microscope used for scanning and examining semiconductor devices. A scanning electron microscope can be operated to generate artificial or induced faults in semiconductor memories, and the raster scanner, in carrying out a scan, will visually display on the oscilloscope natural and artificial or induced faulty locations or cells in semiconductor memories. The semiconductor memory under test is positioned at different locations in the microscope, at each of which an artificial fault is generated until a position is reached, at which the artificial fault coincides, or nearly coincides, with the natural fault location as displayed by the raster scanner. When this is achieved, the electron microscope can then be used to examine the naturally faulty location or cell to determine the reason for the fault.

REFERENCES:
patent: 3549999 (1970-12-01), Norton
patent: 4051437 (1977-09-01), Lile et al.
patent: 4206349 (1980-06-01), Kamimura
Wolfgang, et al., "Electron-Beam Testing of VLSI Circuits", IEEE Transactions on Electron Devices, vol. ED 26, No. 4, Apr. 1979, pp. 549-559.

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