Apparatus for analyzing semiconductor memories

Details Apparatus for analyzing semiconductor memories Apparatus for analyzing semiconductor memories

1980-01-09

1982-01-05

Karlsen, Ernest F.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 51, 324 73R, G01R 3122, G01R 3102

Patent

active

043096573

ABSTRACT:
The disclosure is of apparatus for generating raster scans on an oscilloscope combined with an electron microscope used for scanning and examining semiconductor devices. A scanning electron microscope can be operated to generate artificial or induced faults in semiconductor memories, and the raster scanner, in carrying out a scan, will visually display on the oscilloscope natural and artificial or induced faulty locations or cells in semiconductor memories. The semiconductor memory under test is positioned at different locations in the microscope, at each of which an artificial fault is generated until a position is reached, at which the artificial fault coincides, or nearly coincides, with the natural fault location as displayed by the raster scanner. When this is achieved, the electron microscope can then be used to examine the naturally faulty location or cell to determine the reason for the fault.

REFERENCES:
patent: 3549999 (1970-12-01), Norton
patent: 4051437 (1977-09-01), Lile et al.

Affiliated with

Also associated with

Rating

Apparatus for analyzing semiconductor memories does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for analyzing semiconductor memories, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for analyzing semiconductor memories will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1846341