Apparatus for accessing a memory which has dedicated areas for s

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G06F 302, G06F 1538

Patent

active

048456128

ABSTRACT:
A memory access apparatus in which a data memory has a plurality of data storing areas is accessed by a CPU in accordance with a sequential access method. A window latch and an adder are provided between the memory and CPU. Addresses stored in the window latch and addresses issued by the CPU are added together to create a memory access address. The window latch is so set that a data storing area within the data memory corresponding to an inputted spelling of a word is accessible by the CPU.

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patent: 4408275 (1983-10-01), Kubo et al.
patent: 4543631 (1985-09-01), Kurosu et al.
patent: 4544276 (1985-10-01), Horodeck
"Microprocessors and Microcomputer Development Systems," by Rafiquzzaman, copyright 1984, pp. 166-181.
"Micro Computer Systems: The 808618088 Family", Architecture Programming and Design, 2nd Ed., copyright 1984 & 6, pp. 296-305.

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