Apparatus evaluating the data rates of virtual circuits occupyin

Details Apparatus evaluating the data rates of virtual circuits occupyin Apparatus evaluating the data rates of virtual circuits occupyin

1991-07-19

1993-11-09

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 941, 370 17, H04J 116, H04J 314, H04J 324

Patent

active

052609324

ABSTRACT:
An apparatus for evaluating data rates of virtual circuits occupying an asynchronous time-multiplexed transmission path includes a memory in which each virtual circuit is allocated space containing a context defining conditions for evaluating the data rate of the virtual circuit. This context contains a starting time which was the current time as recorded on receiving an earlier cell in the virtual circuit under consideration. Each time a cell is received, the context of the virtual circuit to which the cell belongs is read, and the starting time is subtracted from the new current time, with the time difference established in this way constituting the basis on which the data rate is evaluated, and with repressive countermeasures being initiated in the event of the data rate being excessive. The apparatus further includes device for cyclically scanning the contexts and for incrementing a scan cycle counter in each context during the cyclic scanning, the scan cycle counter having an initial position. The apparatus is also responsive to the arrival of a cell to read the scan cycle counter, to observe its relative position relative to its initial position, and when the observed relative position corresponds to a given number of scan cycles, to inhibit any repressive countermeasures.

REFERENCES:
patent: 5119364 (1992-06-01), Thiebaut et al.
patent: 5132961 (1992-07-01), Thiebaut et al.
patent: 5138607 (1992-08-01), Thiebaut et al.
patent: 5140588 (1992-08-01), Danner

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