Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Patent
1995-08-02
1998-12-08
Chin, Wellington
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
327161, 375373, H03B 304
Patent
active
058481095
ABSTRACT:
A process and apparatus for sampling a serial digital signal (D), which includes phasing of the digital signal with a clock signal (C) and sampling the digital signal at delayed instants (Si), wherein the phasing is carried out in reference to the sampling instants. The phasing includes determining phasing test instants (Pi) which refer to the sampling instants (Si) to verify whether transitions of the digital signal are leading or lagging in phase relative to the phasing test instants. The determination of the phasing test instants is achieved by adding to each sampling instant (Si) a delay Y=kR/2, in which k is a positive whole odd number other than zero and R designates a pulse repetition period of the bits of the digital signal (D). The invention has particular utility in data processing and remote data processing systems, and to telecommunication systems.
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patent: 4881059 (1989-11-01), Saltzberg
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patent: 5001729 (1991-03-01), Tjahjadi et al.
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Patent Abstracts of Japan vol. 13, No. 544 (E-855) 6 Dec. 1989 & JP-A-12 023 887 (Matsushita Electric Ind Co) 6 Sep. 1989 *abstract*.
Patent Abstracts of Japan vol. 8, No. 49 (E-230) 6 Mar. 1984 & JP-A-58 204 651 (Nippon Denki K.K.) 29 Nov. 1983 *abstract*.
Cofler Andrew
Couteaux Pascal
Duplessix Anne Pierre
Le Bihan Jean-Claude
Marbot Roland
Bull S.A.
Chin Wellington
Corrielus Jean B.
Kondracki, Esq. Edward J.
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