Apparatus and methods for hardware payload header...

Details Apparatus and methods for hardware payload header... Apparatus and methods for hardware payload header...

2002-08-15

2009-10-06

Moe, Aung S (Department: 2416)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S419000, C370S474000

Reexamination Certificate

active

07599369

ABSTRACT:
The present invention provides apparatus and methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS rule verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, one or more bits are suppressed in the payload header and a the payload header suppressed and a payload header suppression index is added to the suppressed packet payload header. Following transmission, the suppression indexed is used to identify the bits to be reinserted into the suppressed payload header.

REFERENCES:
patent: 6438123 (2002-08-01), Chapman
patent: 6788707 (2004-09-01), Horton et al.
patent: WO 01/17314 (2001-03-01), None
patent: WO 01/17314 (2001-03-01), None
Data-Over-Cable Service Interface Specifications—Radio Frequency Interface Specification SP- RFlv1.1-105-000714, Cable Television Laboratories, Inc., pp. i-xviii, 1-6, 15-21, 93-100, and 143-178 (Jul. 14, 2000).
European Search Report from EP Application No. 02256730.9, 3 pages, dated Apr. 14, 2004.

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