Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-05-29
2007-05-29
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
10106297
ABSTRACT:
An apparatus for generating a plurality of counts is provided. A first adder is coupled to receive n least significant bits of a base count and a plurality of signals indicative of a plurality of values to be added to the base count, each of the plurality of values corresponding to one of a plurality of counts to be generated. The first adder generates, for each of the plurality of counts, n least significant bits of the count, and generates a plurality of carry signals. A second adder is coupled to receive most significant bits of the base count and the plurality of carry signals. The second adder generates, for each of the plurality of counts, most significant bits of the count.
REFERENCES:
patent: 5764550 (1998-06-01), D'Souza
patent: 6363408 (2002-03-01), Khan et al.
patent: 6631393 (2003-10-01), Dai
patent: 6832235 (2004-12-01), Muramatsu et al.
Mai Tan V.
Sun Microsystems Inc.
Townsend and Townsend / and Crew LLP
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