Patent
1992-07-17
1996-01-16
Bayerl, Raymond J.
395401, 395481, 395482, G06F 1200
Patent
active
054855942
ABSTRACT:
An Enhanced Processor Buffered Interface (22c) for use in a multiprocessor system (10). The Enhanced Processor Buffered Interface executes an Atomic Fetch and Add operation for maintaining multiprocessor consistency and for minimizing the required participation of an attached processor (22a) in reading and writing locked memory locations, supports interleaved memory banks (22d) that operate with burst mode memory accesses at rates of up to 400 MBytes/sec, includes switchable state machines (52, 54, 100) to selectively provide wait-states as required for supporting different memory access timings, and furthermore provides an improved serial interface to an external multi-element LED display (110).
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Bayerl Raymond J.
International Business Machines - Corporation
Tung Kee M.
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