Apparatus and method to determine a most significant bit

Details Apparatus and method to determine a most significant bit Apparatus and method to determine a most significant bit

1997-08-15

1999-07-06

Malzahn, David H.

Boots, shoes, and leggings

3647151, G06F 738

Patent

active

059204931

ABSTRACT:
An adder using a leading zero/one detector (LZD) circuit and method of use determine an exact normalization shift with fewer logic levels and number of gates, resulting in saving considerable execution time to improve not only the timing as well as to reduce the size of the logic implementing the adder. In addition, a parallel method to locate the most significant digit is disclosed. Such an LZD circuit and method may be incorporated in an integrated circuit, and the LZD circuit includes a propagation value generator for generating a propagation value from input signals representing operands; and a location value generator for generating the location value from the generated propagation value.

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