Apparatus and method to align clocks for repeatable system...

Electricity: battery or capacitor charging or discharging – Serially connected batteries or cells – With discharge of cells or batteries

Reexamination Certificate

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Reexamination Certificate

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09561147

ABSTRACT:
A method and apparatus using a clock generator with sequential logic to align the phase of a first clock generated on a receiving integrated circuit (IC) chip to a second clock received by the receiving IC chip. One embodiment of the invention involves a method for aligning the phase of a first clock relative to the phase of a second clock, wherein the first clock is provided by a clock generator in a data processing system. The method includes sampling the second clock with a sampling clock, detecting an edge on the second clock, and stretching the first clock to align the phase of the first clock relative to the phase of the second clock. A second embodiment of the invention involves a data processing system including a transmitting chip, a receiving chip, and a clock generator for aligning the phase of a first clock relative to the phase of a second clock, wherein the second clock is received by the receiving chip. The clock generator includes a sampling circuit to sample the second clock with a sampling clock, a circuit to detect an edge on the second clock, and a sequential logic circuit to stretch the first clock to align the phase of the first clock relative to the phase of the second clock and control the clock generator.

REFERENCES:
patent: 4637018 (1987-01-01), Flora et al.
patent: 5455935 (1995-10-01), Taylor et al.
patent: 5696951 (1997-12-01), Miller
patent: 6449728 (2002-09-01), Bailey

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