Apparatus and method of testing CML circuits

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324 73AT, G01R 1512

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042901375

ABSTRACT:
A testing apparatus for CML integrated circuits having a power splitter connected at its input to a pulse generator, and at one output to a test unit and at its other output to the CML circuit through a matrix. The output waveform of the CML circuit is provided through the matrix to the test unit.

REFERENCES:
patent: 3597682 (1971-08-01), Hubbs
patent: 3621387 (1971-11-01), Smith
patent: 3633016 (1972-01-01), Walker et al.
patent: 3832535 (1974-08-01), Vito
patent: 3922537 (1975-11-01), Jackson
patent: 4092589 (1978-05-01), Chau et al.
Shattuck "Logic Card Test Apparatus" IBM Tech. Disclosure Bulletin vol. 13 No. 3 Aug. 1970 p. 605.

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