Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
2001-04-09
2002-08-13
Riley, Shawn (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
Reexamination Certificate
active
06434020
ABSTRACT:
FIELD OF THE INVENTION
The present invention is concerned with an apparatus and a method of operating two switches connecting respectively a load to power source terminals in response to a switch control signal. More specifically, the present invention can be applied to PWM inverters.
BACKGROUND OF THE INVENTION
Known in the art, there is the article entitled “The Analysis and Compensation of Dead-Time Effects in PWM inverters by Seung-Gi Jeong et al., published in IEEE transactions on industrial electronics, vol. 38, no. 2, April 1991. In this article, in
FIG. 1
, there is shown a circuit that operates with a dead-time effect. There is shown the leg of one phase of a PWM inverter where power transistors T
1
and T
2
are assumed to be used as switching elements. The PWM control signal drives the transistors T
1
and T
2
through a time delay. The base drive signals B
1
and B
2
are provided for controlling the transistors T
1
and T
2
.
With this kind of configuration, it is essential to insert a time delay in drive signals B
1
and B
2
in order to avoid the conduction overlap of the transistors T
1
and T
2
. Although the time delay guarantees safe operation, it adversely affects the performance of the inverter. This time delay results in a momentary loss of control, and the inverter output voltage waveform deviates from that for which it is originally intended. Since this is repeated over and over for every switching operation, its detrimental effect may become significant in PWM inverters that operate in high switching frequency. This is known as the dead-time effect.
In this article, there is proposed a method (method II) on page 112 for compensating the dead-time effect. This method makes use of a detection of current I circulating through the load. It was observed, on the one hand that when i>0, the shape of the output voltage follows the base drive signal B
1
. On the other hand, when i<0, the voltage is shown to have a shape complementary to that of signal B
2
. From this observation, one can see that the output voltage is determined by only one of the two drive signals B
1
and B
2
which is called the active signal in the following description, whereas the other signal is said to be inactive. Thus, in order to maintain the original pulse width of the control signal, the active drive signal should be made to be the same (or inversely the same) as the control signal. The inactive drive signal needs only to be properly designed to guarantee a safe time delay with respect to given switching instant of the active signal.
Now referring to
FIG. 8
of this article, the signal S is assumed to be a portion of the original PWM wave. S
1
and S
2
are delayed signals of S, by T
d
and 2T
d
, respectively. The following waveforms show two sets of required drive signals B
1
and B
2
to be synthesized for positive and negative currents, respectively. Note that the active drive signal B
1
or B
2
is made to be a replica (or an inverse replica) of S
1
. The other two signals S and S
2
are used to define the transition edges of the inactive drive signal. Under the condition of i<0, the inactive drive signal B
1
rises at the rising edge of S
2
and drops at the falling edge of S, as is shown in FIG.
8
(
a
), but when the pulse width is shorter than twice the time delay, as shown in FIG.
8
(
b
), B
1
is dropped out. The current direction determines which of the signals B
1
and B
2
will be the active signal. Then, the output voltage waveform will follow S
1
, which has the same shape as S, but will be delayed by T
d
, which according to the authors of the article does not matter practically. We do not agree with this latter statement and we believe that this delay T
d
does matter practically. In the system described in this article, this delay T
d
is compulsory because each time a new S signal is generated, the relevant switch has to be open before the moment when the active signal is applied to the relevant switch. As the system does not know the state of the switches when a new S signal is applied, a delay is still needed to make sure that the relevant switch is open before the active drive signal is applied thereto.
Also known in the art, there is the U.S. Pat. No. 5,436,819 of Nobuhiro MIKAMI et al., granted on Jul. 25, 1995 in which there is described an apparatus for compensating an output voltage error of an inverter that changes direct current power into alternating current power. More specifically, according to this invention, a compensation for an output voltage error is obtained by detecting the polarity of output current from any inverter used to change DC power into AC power. A current detector is used to detect the output current of the inverter circuit. As the output voltage error has the same phase but is opposite in polarity relative to the current output by the inverter, an accurate detection of the output error can be made by detecting the output current polarity.
Also known in the art, there is the U.S. Pat. No. 5,506,484 of James L. MUNRO et al., granted on Apr. 9, 1996, and which describes a pulse width modulator circuit for generating pulses to enable a driver control unit to drive a pair of switching circuits for an electric motor. A compare unit compares a digitized input signal with a digitized triangular waveform to produce an output pulse. A dead-time generator unit produces a first pulse and a second pulse from the output pulse produced by the compare unit. The first and second pulses drive respectively the switching circuits, the first and second pulses having different transition times relative to each other.
Also known in the art, there are the following U.S. Pat. Nos. 5,170,334; 5,099,408; 5,115,387; 5,623,192; 4,926,302; 5,712,772; 5,668,489; 5,550,450; 5,550,436; 5,546,052; 5,532,562; 5,450,306; 5,301,085; 5,177,675; 4,719,400; 4,597,026; 4,658,192; 4,348,734; and 3,654,541.
A drawback with all of the system described above, is that a delay is systematically and deliberately introduced in the gate signals applied to the switches to prevent conduction overlap of the switches.
An object of the present invention is to propose a method and an apparatus for operating two switches connecting respectively a load to power source terminals in response to a switch control signal, where most of the time, there is no delay introduced in the gate signals applied to the switches.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a method of operating two switches connecting respectively a load to power source terminals in response to a switch control signal. The method includes detecting a signal indicative of current direction through the load to identify one of the switches as an active switch. If the switch control signal is for switch if a closing gate signal was previously sent to the active switch, and triggering a predetermined time period on a timer associated to the switch that is actually considered the active switch if the sending step is performed. If the switch control signal is for closing the active switch, the method includes sending an opening gate signal to the other switch if a closing gate signal was previously sent to the other switch, triggering a predetermined time period on a timer associated to the switch that is actually considered the other switch if the sending step is performed, and sending a closing gate signal to the active switch when the predetermined time period of the timer associated with the other switch has elapsed.
According to the present invention, there is also provided an apparatus for operating two switches connecting respectively a load to power source terminals in response to a switch control signal. The apparatus includes a detector for detecting a signal indicative of current direction through the load. The apparatus also identifies one of the switches as an active switch in view of the current direction detected by the detector. The apparatus further sends an opening gate signal to the active switch if the switch control signal is for opening the active switch, and
Gingras Pierre
Lambert Ghislain
Foley & Lardner
Hydro-Quebec
Riley Shawn
LandOfFree
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