Pulse or digital communications – Synchronizers
Reexamination Certificate
2006-12-29
2010-11-09
Pathak, Sudhanshu C (Department: 2611)
Pulse or digital communications
Synchronizers
C375S355000, C365S191000, C365S193000, C365S194000, C365S222000, C365S203000, C327S269000, C327S175000
Reexamination Certificate
active
07830999
ABSTRACT:
An apparatus for generating a clock signal of a semiconductor memory includes a first shifting unit that outputs first shifting signals using at least one periodic signal, a control signal generating unit that outputs multiplexing control signals using an inverted clock signal, a second shifting unit that outputs second shifting signals using at least one of the periodic signals, a correcting unit that outputs correction signals having an intermediate phase between the phase of the first shifting signals and the phase of the second shifting signals on the basis of a bias signal applied thereto, a combination unit that combines the first shifting signals and the correction signals to output combined signals, a multiplexing unit that selectively outputs the combined signals on the basis of multiplexing control signals, and a driving unit that drives the clock signal and the inverted clock signal based on the output of the multiplexing unit.
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Kaminski Jeffri A.
Pathak Sudhanshu C
Venable LLP
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