Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2000-06-23
2001-08-07
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Floating gate
Particular connection
C365S185200, C365S185210
Reexamination Certificate
active
06272043
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of flash memory devices. More particularly, the invention relates to an apparatus and method of direct current sensing from the source side of a virtual ground array.
BACKGROUND OF THE INVENTION
The overall array architecture for a typical virtual ground array based flash memory device includes a virtual ground array accessed by a set of row decoders and a set of column decoders/multiplexors. The virtual ground array contains information stored in individual memory elements. The right and left row/word-line decoders are used to access specific memory rows within each memory block and the column decoder/multiplexor provides the input and output circuitry for each memory element.
The architecture of a virtual ground array comprises both individual memory elements and select gates. The memory elements are embodied in non-volatile transistors that may be programmed to a logic state of 0, 1, or other states depending on the particular type of transistor and programming used. The select gates are embodied in normal MOSFETs. Selectable word lines address both the control gates of the transistors that comprise the individual memory elements and select gates in the virtual ground array. Sets of memory elements are connected in series along each word line. The select gates are connected in pairs that are coupled to alternate select gate address lines. The pairs of select gates are connected with pairs of memory elements and a global bitline. A set of multiplexors control the columns that are connected to the external circuitry, such as the sensing circuitry and data-in path. The multiplexors are controlled by a set of column address decoders. Thus the decoders and multiplexors regulate the flow of data into and out of the virtual ground array.
Sensing using the drain side of the virtual ground array has a number of disadvantages. The main disadvantage of drain side sensing is that all the other bitlines connected with memory elements on the drain side not being sensed must be precharged to the drain voltage or higher before the sensing routine commences. Precharging the bitlines, in this case, wastes both time and power. Time is necessary to initiate, perform, and verify the precharging sequence when sensing from the drain side. Excess power is consumed in each of the precharge steps as well, for example decreasing battery lifetime for any portable electronics unit using the virtual ground array. A safe and accurate sensing scheme is needed that does not use sensing from the drain side of the virtual ground array.
BRIEF SUMMARY OF THE INVENTION
In view of the above, an apparatus and method of direct current sensing from the source side of a virtual ground array is provided.
A first aspect of the present invention is directed towards an apparatus of direct current sensing from the source side of a virtual ground array. The virtual ground array contains memory elements, of which each memory element has a source and a drain. A set of memory elements is selected from the virtual ground array and the drains are biased to the same potential. A comparison circuit is used to compare the direct current obtained from the source of a selected memory element in the virtual ground array with the output from a reference circuit. The direct current from the selected memory element is determined by the output of the comparator.
The comparison circuit comprises both a sense load and a reference load. The sense load transforms the direct current provided from the selected memory element into a sense voltage. Similarly, the reference load transforms a current provided from the reference circuit into a reference voltage. The sense and reference voltages are inputted to the comparator. The reference load and the sense load may have the same resistance values or may have different resistance values. If the resistance values are different, a sense ratio is created. The sense load may be variable and, if so, controls the sense margin for different operating states (erase, program, read) of the selected memory element.
The virtual ground array comprises select gates that are selectable by select lines. In addition, memory elements are selectable by individual word lines and at least two of the select gates. Local bitlines connect the select gates with the memory elements and global bitlines connect the select gates with the comparator. The memory elements are disposed along each word line and arranged in series along the word line. The virtual ground array is arranged in pairs of select gates and memory elements. Pairs of select gates are connected with partially overlapping pairs of memory elements. At least one multiplexor is connected between the virtual ground array and the comparator.
Another aspect of the invention is directed towards a method of direct current sensing from the source side of a virtual ground array. The method comprises a step of selecting a set of memory elements having a source and a drain contained in the virtual ground array. The direct current from the source of a selected memory element is compared with a reference output from a reference circuit via a comparator. The direct current from a selected memory element is determined using the output of the comparator.
The direct current is transformed into a sense voltage via a sense load, which is subsequently inputted to the comparator. A reference current is transformed into a reference voltage via a reference load, creating the reference output, which is subsequently inputted to the comparator. A variable sense load controls the sense margin different operating states (erase, program, read) of the selected memory element.
The virtual ground array used in the sensing method comprises select gates that are selectable by select lines. In addition, memory elements are selectable by individual word lines and at least two of the select gates. Local bitlines connect the select gates with the memory elements and global bitlines connect the select gates with the comparator. The memory elements are disposed along each word line and arranged in series along the word line. The virtual ground array is arranged in pairs of select gates and memory elements. Pairs of select gates are connected with partially overlapping pairs of memory elements.
The direct current of one of the selected set of memory elements in the virtual ground array is selected by at least one multiplexor. The multiplexors are connected between the virtual ground array and the comparator.
It is therefore a primary advantage of the present invention to achieve an effective, safe, and simple sensing approach from the source side for a virtual ground array by use of an apparatus or method of sensing direct current. The following figures and detailed description of the preferred embodiments will more clearly demonstrate these and other objects and advantages of the invention.
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Advanced Micro Devices , Inc.
Hoang Huan
Wagner , Murabito & Hao LLP
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