Apparatus and method of adaptive frequency offset...

Pulse or digital communications – Receivers

Reexamination Certificate

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C375S324000, C375S344000

Reexamination Certificate

active

10402154

ABSTRACT:
An apparatus for estimating frequency offset of a demodulator is disclosed. An input symbol is regarded as a rotating phasor obtained by consecutive sampling symbols, while the phasor encompasses an argument containing phase rotated by frequency offset and phase difference by modulation polarity. An adaptive judgment circuit encompassing a decision feedback way is employed to de-polarize the phasor, i.e. to move out the argument of modulation. The adaptive judgment circuit includes a decision circuit and a multiplier. The decision circuit of the adaptive judgment circuit receives the phasor fed from the phase-increment extraction circuit to find a de-noise phasor by using the product of the phasor and a de-noise symbol, wherein the de-noise symbol is determined according to an inner product of the phasor and a last summation stored in a summation circuit. In the multiplier, the de-polarized phasor is obtained by multiplying the phasor by the de-noise symbol before feeding into the next stage, summation circuit. A summation circuit is used for estimating de-polarize phasor by a summation of the de-polarized phasors, while the summation is fed back to the decision circuit for deriving the inner product of the next input symbol. An argument circuit finally extracts the phase offset of the summation containing the frequency offset.

REFERENCES:
patent: 5991289 (1999-11-01), Huang et al.
patent: 6590945 (2003-07-01), Brardjanian et al.
patent: 6650715 (2003-11-01), Kim et al.
patent: 6996156 (2006-02-01), Ono
patent: 2003/0142761 (2003-07-01), Chen

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