Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-05-20
2003-09-23
Vanderpuye, Kenneth (Department: 2661)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S395700, C370S395720, C370S389000, C370S390000, C370S396000, C370S397000, C709S241000, C709S215000, C709S216000, C710S022000, C710S023000, C710S112000
Reexamination Certificate
active
06625157
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to networks and more particularly, to a system and method of controlling network traffic data in a full-duplex switched network operating according to Ethernet (IEEE 802.3) protocol.
2. Description of the Related Art
Switched local area networks use a network switch for supplying data frames between network stations or other network nodes, where each network node is connected to the network switch by a media. The switched local area network architecture uses a media access control (MAC) enabling a network interface within each network node and the network switch to access the media. The network switch stores and forwards data frames received from a transmitter node to a destination node based on header information and the data in the received frames, including source and destination address. An external memory, such as an SSRAM, is used by the network switch to temporarily store the data frames as they are passed through the switch. In particular, the network switch stores and fetches data frames in the external memory via an external memory bus.
Transmission and reception of a data frame in a network switch port typically involves receiving a data packet by a MAC, and transferring the received data packet to a first in first out (FIFO) buffer memory. Conversely, transmit data is stored in a transmit FIFO prior to transmission on the network media by the MAC. One disadvantage with the use of a FIFO for a transmit buffer or a receive buffer is the increased latency encountered during the buffering process. The latency of the network switch port is the time delay between the time that a data frame is supplied to the network switch port and the time the data is transmitted on the network medium interface, or vice versa.
An additional disadvantage with the use of a FIFO or transmit buffer or receive buffer is the increasing complexity associated with maintaining status information for each data frame stored in the FIFO buffer. If a stored data frame is to have corresponding status information, then an additional FIFO buffer would be required for storing the status information for each stored data frame. Moreover, additional synchronization logic would be required to maintain correspondence between the stored frame data and the corresponding status data, increasing the cost and complexity of the network switch.
However, the use of any alternative FIFO buffer may create substantial problems in timing and synchronization within the network switch port. For example, data is received from the network medium according to a network data clock, whereas switched data (i.e., transmit data) is supplied to the network switch port by the network switch according to an internal switch clock. Hence, synchronization issues may cause difficulty in controlling data transfers, as well as avoiding the dropping of data. Hence, the substantial differences in clock speeds between the network switch and network clock rates may cause substantial problems when attempting to transfer data between buffer memories and the MAC.
SUMMARY OF THE INVENTION
There is a need for an arrangement that enables the use of random access buffer memories in a network switch port in a manner that minimizes synchronization issues due to different clock domains.
There is also a need for an arrangement that enables transfer of data between a transmit or receive state machine and a buffer memory in a network switch port according to prescribed interface protocol signals that establish a data transfer protocol independent of different clock domains encountered by the network switch port.
These and other needs are obtained by the present invention where a network switch port includes a transmit state machine and receive state machine for transmitting and receiving network data to and from a medium interface, and a memory management unit configured for selectively transferring the network data between the transmit and receive state machines and respective buffers, based on prescribed interface protocol signals between the memory management unit and the transmit state machine and the receive state machine.
According to one aspect of the present invention, a network switch port in a network switch is configured for sending and receiving data packets between a medium interface and the network switch. The network switch port includes a transmit buffer for storing transmit data from the network switch and a receive buffer for storing receive data to be transferred to the network switch, a transmit state machine and receive state machine for transmitting and receiving the transmit data and receive data onto and from the medium interface according to a prescribed network protocol, respectively, and a memory management unit. The memory management unit is configured for selectively transferring the transmit data and the receive data to and from the transmit state machine and the receive state machine, respectively, based on prescribed interface protocol signals between the memory management unit and the transmit state machine and receive state machine. The selective transfer of transmit data and the receive data by the memory management unit based on prescribed interface protocol signals enables a prescribed interface protocol to be established between the memory management unit and the transmit and receive state machines, enabling data transfers to be performed independent of different clock domains encountered within the network switch port. Hence, the memory management unit and the transmit and receive state machines can transfer data reliably despite the presence of different clock domains, such as a network switch clock domain in the memory management unit, a network transmit clock domain in the transmit state machine, and a network receive clock domain in the receive state machine.
Another aspect of the present invention provides a method in a network switch port of transferring receive data to a network switch from a medium interface. The method includes receiving a data frame carrying receive data in a receive state machine from the medium interface, outputting from a memory management unit a receive buffer availability signal based on a determined availability of memory locations in a random access receive buffer, selectively supplying the receive data from the receive state machine to the random access receive buffer based on the receive buffer availability signal, outputting interface control signals from the receive state machine based on a detected condition of the receive data, and selectively storing the receive data by the memory management unit into the random access receive buffer based on the interface control signals.
Still another aspect of the present invention provides a method in a network switch port of transferring transmit data from a network switch to a medium interface. The method includes storing transmit data received from the network switch in a random access transmit buffer, outputting from a memory management unit a transmit data availability signal based on a determined availability of a prescribed number of bytes of the transmit data in the random access transmit buffer, selectively outputting a transmit buffer advance signal from a transmit state machine based on the transmit buffer availability signal and a determined network condition on the medium interface, supplying the transmit data from the memory management unit to the transmit state machine in response to the transmit buffer advance signal, outputting interface control signals from the transmit state machine based on a detected condition of transmission of the transmit data onto the medium interface, and selectively accessing the random access transmit buffer by the memory management unit based on the interface control signals.
Additional advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by pract
Fischer Jenny Liu
Niu Autumn Jane
Advanced Micro Devices , Inc.
Nguyen Van Kim T.
Vanderpuye Kenneth
LandOfFree
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