Data processing: generic control systems or specific application – Generic control system – apparatus or process – Plural processors
Reexamination Certificate
2005-03-22
2005-03-22
Padmanabhan, Mano (Department: 2188)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Plural processors
C711S154000, C711S161000, C711S162000, C711S141000, C711S118000, C700S003000, C709S208000, C712S034000, C714S006130, C714S013000
Reexamination Certificate
active
06871102
ABSTRACT:
An apparatus for verifying memory coherency of a duplication processor having a symmetrical structure includes: an active processor in which a standby memory read command (SMRC) is generated and transmitted by hardware and then a read data of the standby memory which has been inputted corresponding to the SMRC is image-buffered to verify a memory coherency; and a standby processor in which the SMRC transmitted from the active processor is analyzed and a read command of a standby memory is outputted, and then the data read from the standby memory is transmitted to the active processor. A burst transaction can be performed both when the data is read from the standby memory and when the read data is transmitted, so that the use efficiency of the processor bus, the duplication bus and the duplication channel can be improved. Especially, a bad influence according to the operation of each processor and the duplication channel can be minimized. Moreover, the SMIB provides burst mechanism function, so that the CPU of the active processor can perform the burst transaction in verifying a memory coherency. Thus, the time required for verification can be remarkably reduced.
REFERENCES:
patent: 6327670 (2001-12-01), Hellenthal et al.
patent: 6363464 (2002-03-01), Mangione
patent: 6427213 (2002-07-01), Dao
patent: 6487169 (2002-11-01), Tada
patent: 6553476 (2003-04-01), Ayaki et al.
Fleshner & Kim LLP
LG Electronics Inc.
Padmanabhan Mano
Song Jasmine
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