Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Patent
1996-09-12
1999-08-24
Rinehart, Mark H.
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
709236, 370235, 395873, G06F 1338, G06F 1517
Patent
active
059419520
ABSTRACT:
An apparatus and method for transferring data from a source memory to a transmit buffer memory and then from the transmit buffer memory at a particular rate. A current time counter advances at the rate at which data is to be transmitted from the transmit buffer memory to the interface. A schedule memory stores entries, each valid entry being associated with data that is to be transmitted from the transmit buffer memory to the interface. A timestamp is associated with each valid entry in the schedule memory. Circuitry is then operative on each valid entry read from the schedule table to generate a request for a data transfer between the source memory and the transmit buffer memory; perform a data transfer from the source memory to the transmit buffer memory in response to the request; and transfer the data from the transmit buffer memory when the current time circuitry output reaches a value representing at least the same point in time that is represented by the timestamp associated with the entry for which the request was generated.
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Cheung Wing
Roman Peter J.
Thomas Robert E.
Cabletron Systems Inc.
Rinehart Mark H.
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