Apparatus and method for timing recovery from a pseudo-ternary s

Details Apparatus and method for timing recovery from a pseudo-ternary s Apparatus and method for timing recovery from a pseudo-ternary s

1977-02-17

1978-10-24

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328140, 328150, 307351, 307358, H03K 904

Patent

active

041223977

ABSTRACT:
A circuit for obtaining clock timing information from an equalized pseudo-ternary signal, such as is exemplified by a signal using the modified duobinary code, includes a level selector in which the signal is sliced at a predetermined amplitude. A slicing level reference circuit provides the threshold voltage for the level selector so that only the upper level portion of the original is obtained for processing. This upper level portion is applied to an amplifier and then to a frequency selection circuit which is tuned to the clock frequency of the original signal.

REFERENCES:
patent: 2979662 (1961-04-01), Farrow
patent: 3037170 (1962-05-01), Good et al.
patent: 3274497 (1966-09-01), Zimmerman
patent: 3346742 (1967-10-01), Aniano et al.
patent: 3638037 (1972-01-01), McMurtrie
patent: 3965370 (1976-06-01), Bates
patent: 3991379 (1976-11-01), Chadwick et al.

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