Apparatus and method for the simulation of a large main...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Computer or peripheral device

Reexamination Certificate

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Details

C711S113000, C711S118000, C711S209000

Reexamination Certificate

active

10783817

ABSTRACT:
A main memory simulation system includes storage files, a cache buffer, and an interface. The storage files includes both a fast look-up table and a slow look-up table. The fast look-up table is operable to directly obtain a page address that has been allocated to a main memory address while the slow look-up table is operable to first determine if a page address has been allocated to a main memory address and then to obtain the allocated page address. The interface operates to receive a request for transfer of main memory, in the form of a main memory address, from a storage file to the buffer of the cache. The interface responds by performing a page transfer between the storage file and buffer according to the page address that has been allocated to the requested main memory address, as found in the fast or slow look-up table.

REFERENCES:
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patent: 4954942 (1990-09-01), Masuda et al.
patent: 5278962 (1994-01-01), Masuda et al.
patent: 5530823 (1996-06-01), Tsuchiya et al.
patent: 6230114 (2001-05-01), Hellestrand et al.

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